Re: Shader security model discussions: breaking it down?

A few more things relevant to both forks of this thread. Corentin pointed
me to a few things:
* This is the extension for variable pointers that John talked about at the
meeting:
https://www.khronos.org/registry/spir-v/extensions/KHR/SPV_KHR_variable_pointers.html
* In addition to logical addressing, Vulkan also requires that SPIR-V
programs not contain cycles (Vulkan 1.0 appendix A). So I misspoke about
inlinability - it is indeed one of our constraints and it's one we probably
can't avoid because it's required by Vulkan.

A consequence, IIUC, is that with logical addressing, without cycles,
without variable pointers, it must be statically determinable which buffer
a load instruction loads from. (Branches can/must be used to work around
this.)