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CFP: DTVCS 2008 - Design, Testing and Formal Verification Techniques for Integrated Circuits and Systems

From: ss DTVCS <ss.dtvcs@gmail.com>
Date: Wed, 27 Feb 2008 14:33:09 +0000
Message-ID: <a4cf7b90802270633u3bc99ca2hdcbee47c030be62e@mail.gmail.com>
To: ss.dtvcs@gmail.com
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                             CALL FOR PAPERS
============================================================================
Special Session: Design, Testing and Formal Verification Techniques for
Integrated Circuits and Systems

                                        DTVCS 2008

                         August 18-20, 2008 (Kailua-Kona, Hawaii, USA)
                             http://digilander.libero.it/systemcfl/dtvcs
=============================================================================


Special Session in the IASTED International Conference on Circuits and
Systems (CS 2008)
-------------------------------------------------------------------------------------------------------------------------------------
The IASTED International Conference on Circuits and Systems (CS 2008) will
take place in
Kailua-Kona, Hawaii, USA, August 18-20, 2008.
URL: http://www.iasted.org/conferences/cfp-625.html.


Aims and Scope
---------------
The main target of the Special Session DTVCS is to bring together
engineering researchers,
computer scientists, practitioners and people from industry to exchange
theories, ideas,
techniques and experiences related to the areas of design, testing and
formal verification techniques
for integrated circuits and systems. Contributions on UML and formal
paradigms based on process algebras,
petri-nets, automaton theory and BDDs in the context of design, testing and
formal verification techniques
for integrated circuits and systems are also encouraged.

Topics
------
Topics of interest include, but are not limited to, the following:

* digital, analog, mixed-signal and RF test
* built-in self test
* ATPG
* theory and foundations: model checking, SAT-based methods, use of PSL,
compositional methods and probabilistic methods
* applications of formal methods: equivalence checking, CSP applications and
transaction-level verification
* verification through hybrid techniques
* verification methods based on hardware description/system-level languages
(e.g. VHDL, SystemVerilog and SystemC)
* testing and verification applications: tools, industrial experience
reports and case studies

Industrial Collaborators and Sponsors
----------------------------------------
This special session is partnered with:

* CEOL: Centre for Efficiency-Oriented Languages "Towards improved software
timing",
  University College Cork, Ireland (http://www.ceol.ucc.ie)
* International Software and Productivity Engineering Institute, USA (
http://www.intspei.com)
* Intelligent Support Ltd., United Kingdom (http://www.isupport-ltd.co.uk)
* Minteos, Italy (http://www.minteos.com)
* M.O.S.T., Italy (http://www.most.it)
* Electronic Center, Italy (http://www.el-center.com)
* Legale Fiscale, Italy (http://www.legalefiscale.it)

This special session is sponsored by:

* LS Industrial Systems, South Korea (http://eng.lsis.biz)
* Solari, Hong Kong (http://www.solari-hk.com/)

Technical Program Committee
--------------------------------------------
* Prof. Vladimir Hahanov, Kharkov National University of Radio Electronics,
Ukraine
* Prof. Paolo Prinetto, Politecnico di Torino, Italy
* Prof. Alberto Macii, Politecnico di Torino, Italy
* Prof. Joongho Choi, University of Seoul, South Korea
* Prof. Wei Li, Fudan University, China
* Prof. Michel Schellekens, University College Cork, Ireland
* Prof. Franco Fummi, University of Verona, Italy
* Prof. Jun-Dong Cho, Sung Kyun Kwan University, South Korea
* Prof. AHM Zahirul Alam, International Islamic University Malaysia,
Malaysia
* Prof. Gregory Provan, University College Cork, Ireland
* Dr. Emanuel Popovici, University College Cork, Ireland
* Dr. Jong-Kug Seon, System LSI Lab., LS Industrial Systems Co. Ltd., South
Korea
* Dr. Umberto Rossi, STMicroelectronics, Italy
* Dr. Graziano Pravadelli, University of Verona, Italy
* Dr. Vladimir Pavlov, International Software and Productivity Engineering
Institute, USA
* Dr. Jinfeng Huang, Philips & LiteOn Digital Solutions Netherlands,
Advanced Research Centre,
        The Netherlands
* Dr. Thierry Vallee, Georgia Southern University, Statesboro, Georgia, USA
* Dr. Menouer Boubekeur, University College Cork, Ireland
* Dr. Ana Sokolova, University of Salzburg, Austria
* Dr. Sergio Almerares, STMicroelectronics, Italy
* Ajay Patel (Director), Intelligent Support Ltd, United Kingdom
* Monica Donno (Director), Minteos, Italy
* Alessandro Carlo (Manager), Research and Development Centre of FIAT, Italy
* Yui Fai Lam (Manager), Microsystems Packaging Institute, Hong Kong
University of
   Science and Technology, Hong Kong

Important Dates
---------------------------
April 1, 2008: Deadline for submission of completed papers
May 15, 2008: Notification of acceptance/rejection to authors

Please visit our web-site for further information on the hosting conference
of DTVCS,
submission guidelines, proceedings and publications.

Best regards,

General Chair of DTVCS: Dr. K.L. Man (University College Cork, Ireland)
and
Organising Chairs: Miss Maria O'Keeffe (University College Cork, Ireland)
                     and: Mr. Michele Mercaldi (M.O.S.T., Italy)
Received on Thursday, 28 February 2008 02:56:02 GMT

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